//
// WriteTV.cpp : to write a thorough address testing test vector
//

#include <iostream.h>
#include <iomanip.h>
#include <fstream.h>

#include "stdafx.h"


// some constants for composing the input TV signals values
long FULL_ADDRESS  = 0x3e00;
long NORMAL_INPUTS = 0x40;
long baseline_inputs = 0x0;


void write_single( long no )
{
	cout << "    " << hex << no << endl;
}

void put_N_dummy_cycles( int n )
{
	for( int z=0; z<n; z++ )
	{
		write_single( baseline_inputs );
	}
}

bool firstcall = true;
void change_address_to( int AAA )
{
	int Now = baseline_inputs >> 9;
	// go over 4 bits, change them one at a time
	for( int b=0; b<4; b++ )
	{
//		cout << " Now = " << Now << endl;
		int nowbit = Now>>b & 0x1;
		int aaabit = AAA>>b & 0x1;
		if( nowbit != aaabit )
		{
			// change the bit
//			cout << " baseline = " << baseline_inputs << ", changing bit " << b << " to ..." << endl;
			if( nowbit )
			{
				baseline_inputs -= ( 0x1 << 9+b );
			}else{
				baseline_inputs += ( 0x1 << 9+b );
			}
//			cout << " baseline = " << baseline_inputs << " (new value )" << endl;
			put_N_dummy_cycles( 50 );
		}
	}
}

void write_config_register( int address_no, int config_value )
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	// Field 2
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );
	// Field 3, Table 3.21
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	// Field 4 (address)
	for( int y=0; y<6; y++ )
	{
		int cbit = ( address_no >> 6-1-y ) & 0x1;
		write_single( baseline_inputs | cbit );	
	}
	// Field 5
	for( int x=0; x<6; x++ )
	{
		write_single( baseline_inputs | 0x0 );	
	}
	// Field 6
	for( int w=0; w<16; w++ )
	{
		int abit = ( config_value >> 16-1-w ) & 0x1;
		write_single( baseline_inputs | abit );	
	}
}

void write_to_mask_register( long w1, long w2, long w3, long w4 )
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	// Field 2
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );
	// Field 3, Table 3.21
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	// Field 4 (address), write to all chips here
	for( int y=0; y<6; y++ )
	{
		write_single( baseline_inputs | 0x1 );	
	}
	// Field 5, Table 3.21
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	// Field 6, Table 3.21
	int bit;
	for( int i1=0; i1<32; i1++ )
	{
		bit = ( w1 >> i1 ) & 0x1;
		write_single( baseline_inputs | bit );	
	}
	for( int i2=0; i2<32; i2++ )
	{
		bit = ( w2 >> i2 ) & 0x1;
		write_single( baseline_inputs | bit );	
	}
	for( int i3=0; i3<32; i3++ )
	{
		bit = ( w3 >> i3 ) & 0x1;
		write_single( baseline_inputs | bit );	
	}
	for( int i4=0; i4<32; i4++ )
	{
		bit = ( w4 >> i4 ) & 0x1;
		write_single( baseline_inputs | bit );	
	}
}

void issue_trigger()
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
}

void do_soft_reset()
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	// Field 2
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );
}

void do_bc_reset()
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	// Field 2
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );
}

void enable_data_taking_mode()
{
	// Field 1, Table 3.20
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	// Field 2
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );
	// Field 3, Table 3.21
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	// Field 4 (address), write to all chips here
	for( int y=0; y<6; y++ )
	{
		write_single( baseline_inputs | 0x1 );	
	}
	// Field 5, Table 3.21
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x1 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
	write_single( baseline_inputs | 0x0 );	
}




//-------------------------------------------------
// now, the main action
//-------------------------------------------------


int main(int argc, char* argv[])
{

	// wanna write the beginning initialization
	baseline_inputs = FULL_ADDRESS;
	put_N_dummy_cycles( 4 );
	baseline_inputs = FULL_ADDRESS + NORMAL_INPUTS;
	put_N_dummy_cycles( 136 );

	write_config_register( 0x3f, 0x30c0);
	do_soft_reset();
	issue_trigger();

	// now, the 16x16 loops happen
	// loop over proper addresses
	for( int iA=0; iA<16; iA++ )
	{
//		change_address_to( 0 );
		change_address_to( iA );
		put_N_dummy_cycles( 5 );
		write_config_register( 0x3f, 0x3000 );
		put_N_dummy_cycles( 5 );

		// loop over addresses in the command line
		for( int iC=0; iC<16; iC++ )
		{
			write_config_register( iC, 0x30c0 + iC );
			put_N_dummy_cycles( 5 );
			issue_trigger();
			// the response takes 63 clc
			put_N_dummy_cycles( 75 );
		}
	}
	put_N_dummy_cycles( 50 );

	return 0;
}